Program
Program changes will be published here.
NTF04 -- 30 November - 1 December 2004 | ||
Day 1 - Tuesday 30 November | ||
Time | Title | Presenter |
08:30 | NTF Annual General Assembly | |
10:00 | Registration | |
10:30 | Welcome/Introduction | Knut Båtstoløkken Gunnar Carlsson |
10:40 | Key Note Session | Chairman: Knut Båtstoløkken |
10:40 |
Economics of Testing
|
Michael Wahl, University of Siegen |
11:30 |
Test Challenges and Changes
|
Bernard Sutton, Independent |
12:15 | Exhibition | |
12:45 | Lunch | |
13:45 | Functional Test | Chairman: Gunnar Carlsson |
13:45 |
Functional Test Objectives and Methods
|
Hans Högberg, Ericsson |
14:15 |
Mixed Signal Instruments for Coherent Test Applications
|
Johan Olsson, National Instruments |
14:45 |
Challenges in Integrating RF tests in Functional Test Systems
|
Birger Schneider, microLEX Systems AS |
15:15 | Coffee Break | |
15:45 | RF Test | Chairman: Birger Schneider |
15:45 |
A Modular Instrument Approach
|
Patrik Stenvard, Ericsson |
16:15 |
Bluetooth Radio Test and Qualification
|
Ragnar Lindholm, Rohde & Schwartz |
16:45 |
Bluetooth Test Solution
|
Magnus Björk, Elcoteq Tallinn |
17:15 | Fruit & Refreshments | |
17:45 | News from Conferences | Michael J. Smith, Pete Collins |
18:15 | Should Functional Test Patch the Holes in the Process Control and Test? | Panel moderator: Birger Schneider |
20:00 | Dinner | |
21:30 | Social get-together | |
Day 2 - Wednesday 1 December | ||
Time | Title | Presenter |
08:30 | Structural Test | Chairman: Bengt Magnhagen |
08:30 |
AOI/AXI
|
Michael J. Smith, Teradyne |
09:00 |
Using Flying Prober and Boundary Scan
|
Saeed Taheri, Acculogic |
09:30 |
The Impact of Low Voltage Technologies on In-Circuit Test
|
Michael J. Smith, Teradyne |
10:00 | Coffe Break | |
10:30 | Standards Update | Chairman: Mick Austin |
10:30 |
Mixed signal boundary scan, reality or myth?
|
Pete Collins, JTAG Technologies |
11:00 |
Advanced Digital Signal Boundary-scan (1149.6)
|
Ken Filliter, National Semiconductor |
11:30 |
P1500, a Standard for System on Chip DFT
|
Kim Petersén, HDC |
12:00 | Exhibition | |
12:30 | Lunch | |
13:30 | Test Strategies, Test Economics and Advanced Test Techniques | Chairman: Knut Båtstoløkken |
13:30 |
Using Boundary Scan Emulation for Functional Verification
|
Johan Renberg, ISS Group |
14:00 |
Calculation of Board Test Coverage.
|
Christophe Lotz, ASTER Ingenierie |
14:30 | Coffe Break | |
15:00 |
Strategist - A Test Strategy Tool
|
Michael J. Smith, Teradyne |
15:30 |
System Control of Remote Boundary Scan over I2C/IPMB
|
Gunnar Carlsson, Ericsson |
16:00 | Test Forum Close | Knut Båtstoløkken |